About the job

This role offers an exciting opportunity to join a cutting-edge SoC engineering team as a Formal Verification Engineer, working on advanced ASIC development alongside industry-leading experts. The position involves using formal verification methodologies, SystemVerilog, UVM, and state-of-the-art EDA tools to develop high-volume data-centre and enterprise-level semiconductor products. You will collaborate with multidisciplinary teams, gain exposure to RTL design, verification cycles, scripting (Python/Perl/TCL), and storage interfaces such as PCIe, NVMe, and SAS. The company provides structured technical training, direct mentorship from senior directors with global experience, and opportunities to grow into broader specialisms across ASIC design, verification, and DevOps. The role includes competitive salaries ranging from £50,000 to £130,000, bonuses, hybrid working, medical benefits, paid holidays, pension support, and full visa sponsorship with relocation assistance. This position is ideal for engineers with 5–15+ years of experience who want to develop as highly skilled, well-rounded semiconductor professionals within an innovative and globally collaborative environment.